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[ The PC Guide | Articles and Editorials | Choosing Your SDRAM ]

DRAM Basics

In order to be able to understand the differences between different types of SDRAMs, a little history and description of DRAM technology is necessary. The first thing to realize is that DRAM is DRAM, no matter what it is called. Fast Page Mode DRAM (FPM), Extended Data Out DRAM (EDO) and Synchronous DRAM (SDRAM) all have the same basic DRAM core. The term DRAM means "Dynamic Random Access Memory", which gets its name because the cells which contain the data must be periodically refreshed, as opposed to Static RAM (SRAM), which will hold the data as long as power is applied. DRAM chips are comprised of a "grid" of capacitors, with a row of transistors at the top of the grid. The capacitors are the memory cells, which hold the data, and the transistors are the "sense amps", which read, amplify and transfer the data to the memory bus for transmission to the CPU. Capacitors are used because they are cheaper than transistors, but they are also slower and need to be recharged frequently.

All DRAM chips use the same basic access (read or write) operation, which is as follows (see this section also for details). All memory chips hold their contents in a logical "square" of cells, accessed by providing a column and row address. To read data, first the row is activated using the "Row Address Select" (or "Row Address Strobe", abbreviated "RAS" with a line over it or "/RAS"). This causes the data in the entire row to be transferred to the sense amps. Next, a signal is sent on the "Column Address Select" (or "Column Address Strobe", abbreviated "/CAS") line to choose the specific cell in the grid that contains the desired data. The contents of this cell are then sent out to the bus from the sense amp. This process is repeated for each memory access.

The number of bits output from each memory chip on a read depends upon the specific configuration of the chip; this in turn determines how many chips will be present on a particular module. When looking at chip specs, you might see the configuration indicated as 4x4 or 8x8, for example. These notations mean that there are 4 million cells with 4 bits each (16 megabit chip, 4 bits wide) or 8 million cells with 8 bits each (64 megabit chip, 8 bits wide), respectively. There must be enough chips on the module to fill up the bus, which is called making a bank of memory. Modern PCs use a 64-bit wide data bus, so 64 bits of data must be read at a time; this means you need at least 16 chips if using 4 bit wide chips, or 8 chips if using 8 bit wide chips. Of course in practice, modern DRAM is purchased as either 32-bit SIMMs or 64-bit DIMMs; if you use SIMMs you just use them in pairs to make sure you always have memory that is 64 bits wide.

Next: How SDRAM Differs from Asynchronous DRAM


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